1. Field of the Invention
The present invention relates to a large scale integrated circuit (LSI) microcomputer using a complementary type insulating gate transistor, and particularly provides a microcomputer of which semiconductor chip dimensions are small and power consumption can be minimized.
2. Description of the Prior Art
An arithmetic and logic unit in an integrated circuit (IC) can be generally classified into a static system and a dynamic system from the mechanism of the circuit.
The static system uses only a static logic such as a flip-flop circuit or a latch, and has an advantage that there is no time limit in the holding of information whereas this system has a disadvantage that it uses a large number of elements and accordingly the dimensions of the semiconductor chip become large.
On the other hand, the dynamic system includes dynamic logic which utilizes the electric charge accumulated in the gate floating capacity of an insulating gate type transistor for the maintenance of information. This system has an advantage over the static system in that, when compared with the same circuit, the former uses a smaller number of elements than the latter, in other words, a large number of arithmetic and logic units can be generated in the semiconductor chip of the same dimensions. The dynamic system has a disadvantage, however, since the electric charge of the gate floating capacity disappears because of leakage current. Therefore, it is necessary to rewrite (refresh) in a cycle of a certain time period (within a few milliseconds) to maintain the electric charge and the necessity of refreshing leads to increased power consumption.
Microcomputers of low power consumption operable with a battery, for example, having a large volume of arithmetic and logic units built in a semiconductor chip of small dimensions represented by a single-chip microcomputer, are in demand recently.
As a means for satisfying the request for low power consumption, the use of a complementary type insulating gate transistor (there are many kinds for this type, and all of these shall be hereinafter called "C-MOS" in the present specification) has been considered instead of the conventional P channel or N channel insulating gate transistors. The use of the C-MOS certainly reduces the power consumption. However, when the static system is employed, the required number of elements is large, so that the dimensions of the semiconductor chip become greater. When the dynamic system is employed, an attempt to operate the computer by a clock signal of high frequency to increase the execution speed causes an increase in power consumption due to rise in the frequency.
In examining the dynamic system in detail, the dynamic logic ROM or RAM requires a precharge period. Information in the logic is not destroyed even if the internal system clock is stopped during this precharge period. In other words, a period that can be called an information non-destructive period exists in the dynamic logic. The random logic of the dynamic system also includes a portion of static logic such as the aforementioned latch, and no information is destroyed even if the system clock is stopped during the period while necessary information exists in this static logic. In other words, the period called an information non-destructive period also exists in the random logic.